CS101
532
CS201
225
CS301
232
CS302
174
CS304
192
CS401
224
CS402
258
CS403
228
CS408
113
CS411
121
CS502
249
CS504
268
CS601
679
CS604
381
CS605
261
CS607
184
CS609
230
CS610
300
CS614
100
CS703
65
Code | Question | Option A | Option B | Option C | Option D | Answer | |
---|---|---|---|---|---|---|---|
CS302 | Nor Gate Can Be Used To Perform The Operation Of And Or And Not Gate | True | False | A | |||
CS302 | Nor Gate Is Formed By Connecting ___________ | Or Gate And Then Not Gate | Not Gate And Then Or Gate | And Gate And Then Or Gate | Or Gate And Then And Gate | A | |
CS302 | Occurs When The Same Clock Signal Arrives At Different Times At Different Clock Inputs Due To Propagation Delay | Race Condition | Clock Skew | Ripple Effect | None Of Given Options | B | |
CS302 | Of A D/A Converter Is Determined By Comparing The Actual Output Of A D/A Converter With The Expected Output | Resolution | Accuracy | Quantization | Missing Code | B | |
CS302 | Q2 :=Q1 Or X Or Q3 The Above Abel Expression Will Be | Q2:= Q1 $ X $ Q3 | Q2:= Q1 # X # Q3 | Q2:= Q1 & X & Q3 | Q2:= Q1 ! X ! Q3 | B | |
CS302 | Q2 :=Q1 Or X Or Q3 The Above Abel Expression Will Be | Q2:= Q1 $ X $ Q3 | Q2:= Q1 # X # Q3 | Q2:= Q1 & X & Q3 | Q2:= Q1 ! X ! Q3 | B | |
CS302 | Rco Stands For ___________ | Reconfiguration Counter Output | Reconfiguration Clock Output | Ripple Counter Output | Ripple Clock Output | D | |
CS302 | Smallest Unit Of Binary Data Is A __________ | Bit | Nibble | Byte | Word | A | |
CS302 | Stack Is An Acronym For ___________ | Fifo Memory | Lifo Memory | Flash Memory | Bust Flash Memory | B | |
CS302 | Sum Term (Max Term) Is Implemented Using __________ Gates | Or | And | Not | Or-And | A | |
CS302 | The __________ Input Overrides The __________ Input | Asynchronous Synchronous | Synchronous Asynchronous | Preset Input (Pre) Clear Input (Clr) | Clear Input (Clr) Preset Input (Pre) | A | |
CS302 | The ___________ Of A Rom Is The Time It Takes For The Data To Appear At The Data Output Of The Rom Chip After An Address Is Applied At The Address Input Lines | Write Time | Recycle Time | Refresh Time | Access Time | D | |
CS302 | The 3-Variable Karnaugh Map (K-Map) Has Cells For Min Or Max Terms | 4 | 8 | 12 | 16 | B | |
CS302 | The 4-Bit 2"S Complement Representation Of “+5” Is __________ | 1010 | 1110 | 1011 | 0101 | D | |
CS302 | The 4-Variable Karnaugh Map (K-Map) Has Rows And Colums | 2 2 | 4 4 | 4 2 | 2 4 | B | |
CS302 | The 4-Variable K-Map Has Rows And ___________ Columns Of Cells | 2 2 | 2 4 | 4 2 | 4 4 | D | |
CS302 | The 74Hc163 Is A 4-Bit Synchronous Counter.It Has..............Parallel Data Inputs Pins | 2 | 4 | 6 | 8 | B | |
CS302 | The Abel Symbol For “Or” Operation Is | ! | & | # | $ | C | |
CS302 | The Address From Which The Data Is Read Is Provided By | Depends On Circuitry | None Of Given Options | Ram | Microprocessor | D | |
CS302 | The Alternate Solution For A Demultiplexer-Register Combination Circuit Is ___________ | Parallel In / Serial Out Shift Register | Serial In / Parallel Out Shift Register | Parallel In / Parallel Out Shift Register | Serial In / Serial Out Shift Register | B |