Online Exam Preparation
MCQs Library
Browse subject-wise multiple choice questions, review answers quickly, and start a test from the same section.
Questions
| Code | Question | Option A | Option B | Option C | Option D | Answer |
|---|---|---|---|---|---|---|
| CS302 |
The Terminal Count Of A 4-Bit Binary Counter In The Down Mode Is__________
|
0000
|
0011
|
1100
|
1111
|
D |
| CS302 |
The Terminal Count Of A 4-Bit Binary Counter In The Up Mode Is__________
|
1100
|
0011
|
1111
|
0000
|
D |
| CS302 |
The Three Fundamental Gates Are __________
|
And Nand Xor
|
Or And Nand
|
Not Nor Xor
|
Not Or And
|
D |
| CS302 |
The Total Amount Of Memory That Is Supported By Any Digital System Depends Upon
|
The Organization Of Memory
|
The Structure Of Memory
|
The Size Of Decoding Unit
|
The Size Of The Address Bus Of The Microprocessor
|
D |
| CS302 |
The Voltage Gain Of The Inverting Amplifier Is Given By The Relation __________
|
Vout / Vin = - Rf / Ri
|
Vout / Rf = - Vin / Ri
|
Rf / Vin = - Ri / Vout
|
Rf / Vin = Ri / Vout
|
A |
| CS302 |
Three Cascaded Modulus-10 Counters Have An Overall Modulus Of
|
30
|
100
|
1000
|
0000
|
C |
| CS302 |
Using Multiplexer As Parallel To Serial Converter Requires __________ Connected To The Multiplexer
|
A Parallel To Serial Converter Circuit
|
A Counter Circuit
|
A Bcd To Decimal Decoder
|
A 2-To-8 Bit Decoder
|
A |
| CS302 |
We Have A Digital Circuit. Different Parts Of Circuit Operate At Different Clock Frequencies (4Mhz 2Mhz And 1Mhz) But We Have A Single Clock Source Having A Fix Clock Frequency (4Mhz) We Can Get Help By __________
|
Using S-R Flop-Flop
|
D-Flipflop
|
J-K Flip-Flop
|
T-Flip-Flop
|
C |
| CS302 |
What Is The Difference Between A D Latch And A D Flip-Flop?
|
The D Latch Has A Clock Input
|
The D Flip-Flop Has An Enable Input
|
The D Latch Is Used For Faster Operation
|
The D Flip-Flop Has A Clock Input
|
D |
| CS302 |
When Both The Inputs Of Edge-Triggered J-K Flop-Flop Are Set To Logic Zero ___________
|
The Flop-Flop Is Triggered
|
Q=0 And Q"=1
|
Q=1 And Q’=0
|
The Output Of Flip-Flop Remains Unchanged
|
C |
| CS302 |
When The Both Inputs Of Edge-Triggered J-K Flop-Flop Are Set To Logic Zero
|
The Flop-Flop Is Triggered
|
Q=0 And Q’=1
|
Q=1 And Q’=0
|
The Output Of Flip-Flop Remains Unchanged
|
B |
| CS302 |
When The Control Line In Tri-State Buffer Is High The Buffer Operates Like A __________Gate
|
And
|
Or
|
Not
|
Xor
|
C |
| CS302 |
Which Is Not Characteristic Of A Shift Register?
|
Serial In/Parallel In
|
Serial In/Parallel Out
|
Parallel In/Serial Out
|
Parallel In/Parallel Out
|
A |
| CS302 |
Which One Of The Following Is Not A Valid Rule Of Boolean Algebra?
|
A + 1 = 1
|
A = A
|
A.A = A
|
A + 0 = A
|
B |